EPI_HB16CFG_RDWS=EPI_HB16CFG_RDWS_2, EPI_HB16CFG_MODE=EPI_HB16CFG_MODE_ADMUX, EPI_HB16CFG_WRWS=EPI_HB16CFG_WRWS_2
EPI Host-Bus 16 Configuration
| EPI_HB16CFG_MODE | Host Bus Sub-Mode 0 (EPI_HB16CFG_MODE_ADMUX): ADMUX - AD[15:0] 1 (EPI_HB16CFG_MODE_ADNMUX): ADNONMUX - D[15:0] 2 (EPI_HB16CFG_MODE_SRAM): Continuous Read - D[15:0] 3 (EPI_HB16CFG_MODE_XFIFO): XFIFO - D[15:0] |
| EPI_HB16CFG_BSEL | Byte Select Configuration |
| EPI_HB16CFG_RDWS | Read Wait States 0 (EPI_HB16CFG_RDWS_2): Active RDn is 2 EPI clocks 1 (EPI_HB16CFG_RDWS_4): Active RDn is 4 EPI clocks 2 (EPI_HB16CFG_RDWS_6): Active RDn is 6 EPI clocks 3 (EPI_HB16CFG_RDWS_8): Active RDn is 8 EPI clocks |
| EPI_HB16CFG_WRWS | Write Wait States 0 (EPI_HB16CFG_WRWS_2): Active WRn is 2 EPI clocks 1 (EPI_HB16CFG_WRWS_4): Active WRn is 4 EPI clocks 2 (EPI_HB16CFG_WRWS_6): Active WRn is 6 EPI clocks 3 (EPI_HB16CFG_WRWS_8): Active WRn is 8 EPI clocks |
| EPI_HB16CFG_MAXWAIT | Maximum Wait |
| EPI_HB16CFG_BURST | Burst Mode |
| EPI_HB16CFG_RDCRE | PSRAM Configuration Register Read |
| EPI_HB16CFG_WRCRE | PSRAM Configuration Register Write |
| EPI_HB16CFG_ALEHIGH | ALE Strobe Polarity |
| EPI_HB16CFG_RDHIGH | READ Strobe Polarity |
| EPI_HB16CFG_WRHIGH | WRITE Strobe Polarity |
| EPI_HB16CFG_XFEEN | External FIFO EMPTY Enable |
| EPI_HB16CFG_XFFEN | External FIFO FULL Enable |
| EPI_HB16CFG_IRDYINV | Input Ready Invert |
| EPI_HB16CFG_RDYEN | Input Ready Enable |
| EPI_HB16CFG_CLKINV | Invert Output Clock Enable |
| EPI_HB16CFG_CLKGATEI | Clock Gated Idle |
| EPI_HB16CFG_CLKGATE | Clock Gated |